Intel® X86 Encoder Decoder
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Small Examples of using Intel® XED

Here is a minimal example of using Intel® XED from the file examples/xed-dec-min.c.

/* BEGIN_LEGAL
Copyright (c) 2025 Intel Corporation
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
END_LEGAL */
#include <stdio.h>
int main(int argc, char** argv);
int main(int argc, char** argv) {
xed_address_width_enum_t stack_addr_width;
xed_bool_t long_mode = 0;
// create the decoded instruction, and fill in the machine mode (dstate)
// make up a simple 2Byte instruction to decode
unsigned int bytes = 0;
unsigned char itext[15] = { 0xf, 0x85, 0x99, 0x00, 0x00, 0x00 };
// initialize the XED tables -- one time.
// The state of the machine -- required for decoding
if (long_mode) {
stack_addr_width = XED_ADDRESS_WIDTH_64b;
}
else {
stack_addr_width = XED_ADDRESS_WIDTH_32b;
}
// This is a test of error handling. I vary the instuction length from
// 0 bytes to 15 bytes. Normally, you should send in 15 bytes of itext
// unless you are near the end of a page and don't want to take a page
// fault or tlb miss. Note, you have to reinitialize the xedd each time
// you try to decode in to it.
// Try different instruction lengths to see when XED recognizes an
// instruction as valid.
for(bytes = 0;bytes<=15;bytes++) {
xed_error_enum_t xed_error;
xed_decoded_inst_set_mode(&xedd, mmode, stack_addr_width);
xed_error = xed_decode(&xedd,
bytes);
printf("%d %s\n",(int)bytes, xed_error_enum_t2str(xed_error));
}
(void) argc; (void) argv; //pacify compiler
return 0;
}
static XED_INLINE void xed_decoded_inst_set_mode(xed_decoded_inst_t *p, xed_machine_mode_enum_t mmode, xed_address_width_enum_t stack_addr_width)
Set the machine mode and stack addressing width directly.
Definition xed-decoded-inst-api.h:262
XED_DLL_EXPORT void xed_decoded_inst_zero(xed_decoded_inst_t *p)
Zero the decode structure completely.
XED_DLL_EXPORT xed_error_enum_t xed_decode(xed_decoded_inst_t *xedd, const xed_uint8_t *itext, const unsigned int bytes)
This is the main interface to the decoder.
struct xed_decoded_inst_s xed_decoded_inst_t
The main container for instructions.
XED_DLL_EXPORT const char * xed_error_enum_t2str(const xed_error_enum_t p)
This converts strings to xed_error_enum_t types.
XED_DLL_EXPORT void xed_tables_init(void)
This is the call to initialize the XED encode and decode tables.
xed_address_width_enum_t
Definition xed-address-width-enum.h:31
@ XED_ADDRESS_WIDTH_32b
32b addressing
Definition xed-address-width-enum.h:34
@ XED_ADDRESS_WIDTH_64b
64b addressing
Definition xed-address-width-enum.h:35
xed_error_enum_t
Definition xed-error-enum.h:47
xed_machine_mode_enum_t
Definition xed-machine-mode-enum.h:35
@ XED_MACHINE_MODE_LONG_64
64b operating mode
Definition xed-machine-mode-enum.h:37
@ XED_MACHINE_MODE_LEGACY_32
32b protected mode
Definition xed-machine-mode-enum.h:40
#define XED_STATIC_CAST(x, y)
Definition xed-portability.h:27
uint8_t xed_uint8_t
Definition xed-types.h:30
unsigned int xed_bool_t
Definition xed-types.h:42

The examples can be compiled manually from a kit, using the following steps: % gcc -Ipath-to-xed-kit/include -Ipath-to-xed-kit/examples \ -c path-to-xed-kit/examples/xed-dec-min.c % gcc -o xed-dec-min xed-dec-min.o path-to-xed-kit/lib/libxed.a where path-to-xed-kit is where you have your include, examples and lib directories from an installed Intel® XED kit.

Here is a more detailed example (examples/xed-dec.c) that walks the operands much like the printing routines do for the xed_decoded_inst_t .

/* BEGIN_LEGAL
Copyright (c) 2025 Intel Corporation
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
END_LEGAL */
#include "xed-examples-util.h"
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <string.h>
#define TBUFSZ 90
int main(int argc, char** argv);
void print_misc(xed_decoded_inst_t* xedd) {
xed_uint_t i=0, j=0;
const xed_inst_t* xi = xed_decoded_inst_inst(xedd);
printf("REAL REP ");
printf("\tcorresponding no-rep iclass: %s\n" ,
}
printf("F3 PREFIX\n");
}
printf("F2 PREFIX\n");
}
printf("67 PREFIX\n");
}
/* this 66 prefix is not part of the opcode */
printf("66-OSZ PREFIX\n");
}
/* this 66 prefix is mandatory */
printf("MANDATORY 66 PREFIX\n");
}
/* this is any 66 prefix including the above */
printf("ANY 66 PREFIX\n");
}
if (xed3_operand_get_rex2(xedd)) {
/* Legacy instructions with REX2 prefix have no new iforms. This function returns a non-zero
number if REX2 prefix is detected for a Legacy instruction */
printf("REX2 PREFIX\n");
}
printf("RING0 only\n");
}
printf("EXCEPTION TYPE: %s\n", xed_exception_enum_t2str(e));
}
printf("BROADCAST\n");
#if defined(XED_APX)
if (xed_classify_apx(xedd))
{
printf("[APX] ");
printf("New-Data-Destination ");
}
printf("No-Flags ");
}
/* returns a non-zero number if one of the register/memory-structure operands of a decoded
instruction is an extended GPR(EGPR) (valid for both Legacy and EVEX instructions) */
printf("Uses-EGPR ");
}
printf("Zero-Upper ");
}
printf("\n");
}
#endif
if (xed_classify_sse(xedd) || xed_classify_avx(xedd) || xed_classify_avx512(xedd) ||
{
if (xed_classify_amx(xedd))
printf("AMX\n");
printf("AVX512 KMASK-OP\n");
else {
xed_bool_t sse = 0;
if (xed_classify_sse(xedd)) {
sse = 1;
printf("SSE\n");
}
else if (xed_classify_avx(xedd))
printf("AVX\n");
else if (xed_classify_avx512(xedd))
printf("AVX512\n");
printf("SCALAR\n");
else {
// xed_decoded_inst_vector_length_bits is only for VEX/EVEX instr.
// This will print 128 vl for FXSAVE and LD/ST MXCSR which is unfortunate.
xed_uint_t vl_bits = sse ? 128 : xed_decoded_inst_vector_length_bits(xedd);
printf("Vector length: %u\n", vl_bits);
}
if (xed_classify_avx512(xedd)) {
printf( "AVX512 vector elements: %u\n", vec_elements);
}
}
}
// does not include instructions that have XED_ATTRIBUTE_MASK_AS_CONTROL.
// does not include vetor instructions that have k0 as a mask register.
printf("WRITE-MASKING\n");
if (np)
printf("Number of legacy prefixes: %u \n", np);
printf("ISA SET: [%s]\n", xed_isa_set_enum_t2str(isaset));
{
if (cpuidgrp == XED_CPUID_GROUP_INVALID)
break;
printf("%u\tCPUID GROUP NAME: [%s]\n", i, xed_cpuid_group_enum_t2str(cpuidgrp));
{
cpuidrec = xed_get_cpuid_rec_enum_for_group(cpuidgrp,j);
if (cpuidrec == XED_CPUID_REC_INVALID)
break;
printf("\t%u\tCPUID RECORD NAME: [%s]\n", j, xed_cpuid_rec_enum_t2str(cpuidrec));
r = xed_get_cpuid_rec(cpuidrec, &crec);
if (r) {
printf("\t\t{Leaf 0x%08x, subleaf 0x%08x, %s[%u:%u]} = %u\n",
crec.leaf, crec.subleaf, xed_reg_enum_t2str(crec.reg),
crec.bit_start, crec.bit_end, crec.value);
}
else {
printf("Could not find cpuid leaf information\n");
}
}
}
#if defined(XED_SUPPORTS_AVX512)
{
static char const* rounding_modes[5] = { "", "rne-sae", "rd-sae", "ru-sae", "rz-sae"};
int t = xed3_operand_get_roundc(xedd);
printf("suppress-all-exceptions (SAE) set\n");
if (t>0 && t<5)
printf("rounding mode override = %s\n", rounding_modes[t]);
}
#endif
}
void print_branch_hints(xed_decoded_inst_t* xedd) {
printf("HINT: NOT TAKEN\n");
printf("HINT: TAKEN\n");
printf("CET NO-TRACK\n");
}
void print_attributes(xed_decoded_inst_t* xedd) {
/* Walk the attributes. Generally, you'll know the one you want to
* query and just access that one directly. */
const xed_inst_t* xi = xed_decoded_inst_inst(xedd);
unsigned int i, nattributes = xed_attribute_max();
printf("ATTRIBUTES: ");
for(i=0;i<nattributes;i++) {
if (xed_inst_get_attribute(xi,attr))
printf("%s ", xed_attribute_enum_t2str(attr));
}
printf("\n");
}
void print_reads_zf_flag(xed_decoded_inst_t* xedd) {
/* example of reading one bit from the flags set */
if (read_set->s.zf) {
printf("READS ZF\n");
}
}
}
void print_flags(xed_decoded_inst_t* xedd) {
unsigned int i, nflags;
assert(rfi);
printf("FLAGS:\n");
printf(" reads-rflags ");
}
//XED provides may-write and must-write information
printf(" may-write-rflags ");
}
printf(" must-write-rflags ");
}
}
for( i=0;i<nflags ;i++) {
const xed_flag_action_t* fa =
char buf[500];
xed_flag_action_print(fa,buf,500);
printf("%s ", buf);
}
printf("\n");
// or as as bit-union
{
xed_flag_set_t const* read_set =
/* written set include undefined flags */
xed_flag_set_t const* written_set =
xed_flag_set_t const* undefined_set =
char buf[500];
xed_flag_set_print(read_set,buf,500);
printf(" read: %30s mask=0x%x\n",
buf,
xed_flag_set_mask(read_set));
xed_flag_set_print(written_set,buf,500);
printf(" written: %30s mask=0x%x\n",
buf,
xed_flag_set_mask(written_set));
xed_flag_set_print(undefined_set,buf,500);
printf(" undefined: %30s mask=0x%x\n",
buf,
xed_flag_set_mask(undefined_set));
}
#if defined(XED_APX)
/* print Default Flags Values */
xed_flag_dfv_t dfv_mask;
/* Direct access to the DFV 4-bit mask:
* xed_bits_t dfv_mask = xed3_operand_get_dfv(xedd);
* CF -> dfv_mask.bit[0]
* ZF -> dfv_mask.bit[1]
* SF -> dfv_mask.bit[2]
* OF -> dfv_mask.bit[3]
* Here, we use the XED built-in API and structure:
*/
assert(okay);
printf(" default:%13sof=%u, sf=%u, zf=%u, cf=%u\n",
"",
dfv_mask.s.of,
dfv_mask.s.sf,
dfv_mask.s.zf,
dfv_mask.s.cf);
}
#endif
}
}
void print_memops(xed_decoded_inst_t* xedd) {
unsigned int i, memops = xed_decoded_inst_number_of_memory_operands(xedd);
printf("Memory Operands\n");
for( i=0;i<memops ; i++) {
xed_bool_t r_or_w = 0;
printf(" %u ",i);
if ( xed_decoded_inst_mem_read(xedd,i)) {
printf(" read ");
r_or_w = 1;
}
printf("written ");
r_or_w = 1;
}
if (!r_or_w) {
printf(" agen "); // LEA instructions
}
if (seg != XED_REG_INVALID) {
printf("SEG= %s ", xed_reg_enum_t2str(seg));
}
if (base != XED_REG_INVALID) {
printf("BASE= %3s/%3s ",
}
if (i == 0 && indx != XED_REG_INVALID) {
printf("INDEX= %3s/%3s ",
if (xed_decoded_inst_get_scale(xedd,i) != 0) {
// only have a scale if the index exists.
printf("SCALE= %u ",
}
}
{
xed_uint_t disp_bits =
if (disp_bits)
{
printf("DISPLACEMENT_BYTES= %u ", disp_bits);
printf("0x" XED_FMT_LX16 " base10=" XED_FMT_LD, disp, disp);
}
}
printf(" ASZ%u=%u\n",
i,
}
printf(" MemopBytes = %u\n",
}
void print_operands(xed_decoded_inst_t* xedd) {
unsigned int i, noperands;
char tbuf[TBUFSZ];
const xed_inst_t* xi = xed_decoded_inst_inst(xedd);
xed_uint_t bits;
printf("Operands\n");
noperands = xed_inst_noperands(xi);
printf("# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS\n");
printf("# ==== ======= === == === ==== ===== ===== ====== ======== ========\n");
tbuf[0]=0;
for( i=0; i < noperands ; i++) {
const xed_operand_t* op = xed_inst_operand(xi,i);
printf("%u %6s ",
switch(op_name) {
// we print memops in a different function
xed_strcpy(tbuf, "(see below)");
break;
case XED_OPERAND_PTR: // pointer (always in conjunction with a IMM0)
case XED_OPERAND_ABSBR: // Absolute branch displacements
case XED_OPERAND_RELBR: { // Relative branch displacements
xed_uint_t disp_bytes =
if (disp_bytes) {
char buf[40];
const unsigned int no_leading_zeros=0;
const xed_bool_t lowercase = 1;
xed_uint_t disp_bits =
xed_int64_t disp =
xed_itoa_hex_ul(buf, disp, disp_bits, no_leading_zeros, 40, lowercase);
#if defined (_WIN32) && !defined(PIN_CRT)
_snprintf_s(tbuf, TBUFSZ, TBUFSZ,
"BRANCH_DISPLACEMENT_BYTES=%u 0x%s",
disp_bytes,buf);
#else
snprintf(tbuf, TBUFSZ,
"BRANCH_DISPLACEMENT_BYTES=%u 0x%s",
disp_bytes,buf);
#endif
}
}
break;
case XED_OPERAND_IMM0: { // immediates
char buf[64];
const unsigned int no_leading_zeros=0;
xed_uint_t ibits;
const xed_bool_t lowercase = 1;
xed_uint_t rbits = ibits?ibits:8;
ibits));
xed_itoa_hex_ul(buf, y, rbits, no_leading_zeros, 64, lowercase);
}
else {
xed_uint_t rbits = ibits?ibits:16;
xed_itoa_hex_ul(buf, x, rbits, no_leading_zeros, 64, lowercase);
}
#if defined (_WIN32) && !defined(PIN_CRT)
_snprintf_s(tbuf, TBUFSZ, TBUFSZ,
"0x%s(%ub)",buf,ibits);
#else
snprintf(tbuf,TBUFSZ,
"0x%s(%db)",buf,ibits);
#endif
break;
}
case XED_OPERAND_IMM1: { // 2nd immediate is always 1 byte.
#if defined (_WIN32) && !defined(PIN_CRT)
_snprintf_s(tbuf, TBUFSZ, TBUFSZ,
"0x%02x",(int)x);
#else
snprintf(tbuf,TBUFSZ,
"0x%02x",(int)x);
#endif
break;
}
{
#if defined (_WIN32) && !defined(PIN_CRT)
_snprintf_s(tbuf, TBUFSZ, TBUFSZ,
"%s=%s",
#else
snprintf(tbuf,TBUFSZ,
"%s=%s",
#endif
break;
}
default:
printf("need to add support for printing operand: %s",
assert(0);
}
printf("%21s", tbuf);
printf(" %10s %3s %9s",
printf( " %3u", bits);
/* rounding, bits might not be a multiple of 8 */
printf(" %4u", (bits +7) >> 3);
printf(" %2u", xed_decoded_inst_operand_elements(xedd,i));
printf(" %10s",
printf(" %10s\n",
xed_decoded_inst_get_reg(xedd, op_name))));
}
}
void print_enc_bits(xed_decoded_inst_t *d, xed_error_enum_t xed_error)
{
char buf[TBUFSZ];
#define FLDFMT "%-8s %-21s " // Field format -> position (name)
#define FLDFMT_S FLDFMT"= 0b%s\n" // Row format -> position (name) = string
#define FLDFMT_B FLDFMT"= 0b%01u\n" // Row format -> position (name) = bit
printf("[Encoding Bits]\n");
#if defined(XED_SUPPORTS_AVX512)
// EVEX payloads
{
// Prepare data
xed_bits_t evvspace = 0; // EVEX sub encoding space
xed_bits_t vvvv;
#if defined(XED_APX)
if (apx_supported && xed3_operand_get_mod(d) != 3) {
// In this case, XED ILD forces UBIT=1 and uploads the bit value to REXX4
ubit_x4 = (~xed3_operand_get_rexx4(d))&1;
}
#endif
vvvv |= (xed3_operand_get_vexdest3(d) & 1) << 3;
// Dump
printf("====================== EVEX payload #0 ======================\n");
printf("%-30s = 0x62\n", "P0");
printf("====================== EVEX payload #1 ======================\n");
if (apx_supported) {
xed_itoa_bin(buf, xed3_operand_get_map(d), 3, TBUFSZ);
printf(FLDFMT_S, "P1[2:0]", "(EVEX.mmm)", buf);
printf(FLDFMT_B, "P1[3]", "(EVEX.reserved / APX.B4)", xed3_operand_get_rexb4(d));
}
else {
xed_itoa_bin(buf, xed3_operand_get_map(d), 4, TBUFSZ);
printf(FLDFMT_S, "P1[3:0]", "(EVEX.mmmm)", buf);
}
printf(FLDFMT_B, "P1[4]", "(EVEX.R4)", (~xed3_operand_get_rexr4(d)) & 1);
printf(FLDFMT_B, "P1[5]", "(EVEX.B3)", (~xed3_operand_get_rexb(d)) & 1);
printf(FLDFMT_B, "P1[6]", "(EVEX.X3)", (~xed3_operand_get_rexx(d)) & 1);
printf(FLDFMT_B, "P1[7]", "(EVEX.R3)", (~xed3_operand_get_rexr(d)) & 1);
printf("====================== EVEX payload #2 ======================\n");
printf(FLDFMT_S, "P2[1:0]", "(EVEX.pp)", buf);
printf(FLDFMT_B, "P2[2]", "(EVEX.U / APX.X4)", ubit_x4);
xed_itoa_bin(buf, vvvv, 4, TBUFSZ);
printf(FLDFMT_S, "P2[3:6]", "(EVEX.vvvv / APX.DFV)", buf);
printf(FLDFMT_B, "P2[7]", "(EVEX.W)", xed3_operand_get_rexw(d));
printf("====================== EVEX payload #3 ======================\n");
/* P3[0:4]
*
* EVVSPACE!=0 is a hint for a legal APX instruction
* APX instruction's NT resets several EVEX operands during the late decoding phase
* and replaces them with APX-specific operands. In this case, we should dump the
* APX-specific operands.
*/
if (xed_error != XED_ERROR_NONE) {
// Illegal instruction
// Dump both the EVEX and APX interpretation
xed_itoa_bin(buf, xed3_operand_get_mask(d), 3, TBUFSZ);
printf(FLDFMT_S, "P3[0:2]", "(EVEX.aaa)", buf);
#if defined(XED_APX)
if (apx_supported) {
printf(FLDFMT_B, "P3[2]", "(APX.NF)", xed3_operand_get_nf(d));
if (xed3_operand_get_map(d) == 4) {
xed_itoa_bin(buf, xed3_operand_get_scc(d), 4, TBUFSZ);
printf(FLDFMT_S, "P3[0:3]", "(APX.SCC)", buf);
}
}
#endif
printf(FLDFMT_B, "P3[3]", "(EVEX.V4)", (~xed3_operand_get_vexdest4(d)) & 1);
printf(FLDFMT_B, "P3[4]", "(EVEX.b / APX.ND)", xed3_operand_get_bcrc(d));
}
else if (evvspace == 0)
{
// Traditional EVEX interpretation
xed_itoa_bin(buf, xed3_operand_get_mask(d), 3, TBUFSZ);
printf(FLDFMT_S, "P3[0:2]", "(EVEX.aaa)", buf);
printf(FLDFMT_B, "P3[3]", "(EVEX.V4)", (~xed3_operand_get_vexdest4(d)) & 1);
printf(FLDFMT_B, "P3[4]", "(EVEX.b)", xed3_operand_get_bcrc(d));
}
#if defined(XED_APX)
else if (evvspace == 1)
{
// APX instruction
xed_itoa_bin(buf, xed3_operand_get_mask(d), 2, TBUFSZ);
printf(FLDFMT_S, "P3[0:1]", "(EVEX.aa)", buf);
printf(FLDFMT_B, "P3[2]", "(APX.NF)", xed3_operand_get_nf(d));
printf(FLDFMT_B, "P3[3]", "(EVEX.V4)", (~xed3_operand_get_vexdest4(d)) & 1);
printf(FLDFMT_B, "P3[4]", "(APX.ND)", xed3_operand_get_nd(d));
}
else if (evvspace == 2)
{
// APX SCC instruction
xed_itoa_bin(buf, xed3_operand_get_scc(d), 4, TBUFSZ);
printf(FLDFMT_S, "P3[0:3]", "(APX.SCC)", buf);
printf(FLDFMT_B, "P3[4]", "(APX.ND)", xed3_operand_get_nd(d));
}
#endif
/* P3[5:7] */
xed_itoa_bin(buf, xed3_operand_get_llrc(d), 2, TBUFSZ);
printf(FLDFMT_S, "P3[5:6]", "(EVEX.LL/RC)", buf);
printf(FLDFMT_B, "P3[7]", "(EVEX.z)", xed3_operand_get_zeroing(d));
}
#endif // XED_SUPPORTS_AVX512
/* Opcode */
printf("========================== Opcode ===========================\n");
printf("%-30s = 0x%02x\n", "Nominal opcode", xed3_operand_get_nominal_opcode(d));
/* ModRM*/
{
printf("=========================== ModRM ===========================\n");
xed_itoa_bin(buf, xed3_operand_get_rm(d), 3, TBUFSZ);
printf(FLDFMT_S, "p[0:2]", "(R/M)", buf);
xed_itoa_bin(buf, xed3_operand_get_reg(d), 3, TBUFSZ);
printf(FLDFMT_S, "p[3:5]", "(REG)", buf);
xed_itoa_bin(buf, xed3_operand_get_mod(d), 2, TBUFSZ);
printf(FLDFMT_S, "p[6:7]", "(MOD)", buf);
}
(void)xed_error; // pacify compiler
}
int main(int argc, char** argv) {
xed_state_t dstate;
xed_uint_t i, bytes = 0;
xed_uint_t argcu = (xed_uint_t)argc;
unsigned char itext[XED_MAX_INSTRUCTION_BYTES];
xed_uint_t first_argv;
xed_bool_t already_set_mode = 0, verbose = 0;
char const* decode_text=0;
unsigned int len;
xed_error_enum_t xed_error;
xed_uint_t operands_index = 0;
xed_operand_enum_t operands[XED_MAX_INPUT_OPERNADS] = {XED_OPERAND_INVALID};
xed_uint32_t operands_value[XED_MAX_INPUT_OPERNADS] = {0};
xed_uint_t features_index = 0;
xed_isa_set_enum_t features[XED_MAX_INPUT_OPERNADS] = {XED_ISA_SET_INVALID};
xed_bool_t features_value[XED_MAX_INPUT_OPERNADS] = {0};
xed_chip_features_t chip_features;
#if defined(XED_MPX)
unsigned int mpx_mode=0;
#endif
#if defined(XED_CET)
unsigned int cet_mode=0;
#endif
xed_state_zero(&dstate);
first_argv = 1;
for(i=1;i< argcu;i++) {
if (strcmp(argv[i], "-64") == 0) {
assert(already_set_mode == 0);
already_set_mode = 1;
first_argv++;
}
#if defined(XED_MPX)
else if (strcmp(argv[i], "-mpx") == 0) {
mpx_mode = 1;
first_argv++;
}
#endif
#if defined(XED_CET)
else if (strcmp(argv[i], "-cet") == 0) {
cet_mode = 1;
first_argv++;
}
#endif
else if (strcmp(argv[i], "-16") == 0) {
assert(already_set_mode == 0);
already_set_mode = 1;
first_argv++;
}
else if (strcmp(argv[i], "-s16") == 0) {
already_set_mode = 1;
first_argv++;
}
else if (strcmp(argv[i], "-chip") == 0) {
assert(i+1 < argcu);
chip = str2xed_chip_enum_t(argv[i+1]);
printf("Setting chip to %s\n", xed_chip_enum_t2str(chip));
assert(chip != XED_CHIP_INVALID);
first_argv+=2;
}
else if (strcmp(argv[i], "-v") == 0)
{
verbose = 1;
first_argv++;
}
else if (strcmp(argv[i], "-set") == 0) {
assert(i+2 < argcu); // needs 2 args
if (operands_index >= XED_MAX_INPUT_OPERNADS) {
printf("ERROR: too many -set operands, max is %d\n", XED_MAX_INPUT_OPERNADS);
exit(1);
}
operands[operands_index] = str2xed_operand_enum_t(argv[i+1]);
if (operands[operands_index] == XED_OPERAND_INVALID){
printf("ERROR: operand %s doesn't exist\n", argv[i+1]);
exit(1);
}
operands_value[operands_index] = XED_STATIC_CAST(xed_uint8_t, xed_atoi_general(argv[i+2],1000));
operands_index++;
first_argv+=3;
}
else if (strcmp(argv[i], "-feature") == 0)
{
assert(i + 2 < argcu); // needs 2 args
if (features_index >= XED_MAX_INPUT_OPERNADS)
{
printf("ERROR: too many -features, max is %d\n", XED_MAX_INPUT_OPERNADS);
exit(1);
}
features[features_index] = str2xed_isa_set_enum_t(argv[i + 1]);
if (features[features_index] == XED_ISA_SET_INVALID)
{
printf("ERROR: '%s' ISA-SET doesn't exist\n", argv[i + 1]);
exit(1);
}
features_value[features_index] = XED_STATIC_CAST(xed_uint8_t, xed_atoi_general(argv[i + 2], 1));
features_index++;
first_argv += 3;
}
else if (strcmp(argv[i], "-size") == 0){
printf("printing XED data structures and their corresponding sizes...\n");
printf("xed_decoded_inst_t %12d\n", (int)sizeof(xed_decoded_inst_t));
printf("xed_inst_t %12d\n", (int)sizeof(xed_inst_t));
printf("xed_operand_t %12d\n", (int)sizeof(xed_operand_t));
printf("xed_iform_info_t %12d\n", (int)sizeof(xed_iform_info_t));
exit(0);
}
}
assert(first_argv < argcu);
if (chip == XED_CHIP_INVALID) {
// Enable all features if a chip is not chosen.
chip = XED_CHIP_ALL;
}
xed_get_chip_features(&chip_features, chip);
#if defined(XED_MPX)
xed_modify_chip_features(&chip_features, XED_ISA_SET_MPX, mpx_mode);
#endif
#if defined(XED_CET)
xed_modify_chip_features(&chip_features, XED_ISA_SET_CET, cet_mode);
#endif
// set the value of operands referenced after '-set'
for (i = 0; i < operands_index; i++)
xed3_set_generic_operand(&xedd, operands[i], operands_value[i]);
// set the value of isa-set features referenced after '-feature'
for (i = 0; i < features_index; i++)
xed_modify_chip_features(&chip_features, features[i], features_value[i]);
// convert ascii hex to hex bytes
for(i=first_argv; i< argcu;i++)
decode_text = xedex_append_string(decode_text,argv[i]);
len = (unsigned int) strlen(decode_text);
if ((len & 1) == 1) {
printf("Must supply even number of nibbles per substring\n");
exit(1);
}
printf("Must supply at most 30 nibbles (15 bytes)\n");
exit(1);
}
bytes = xed_convert_ascii_to_hex(decode_text,
itext,
if (bytes == 0) {
printf("Must supply some hex bytes\n");
exit(1);
}
printf("Attempting to decode: ");
for(i=0;i<bytes;i++)
printf("%02x ", XED_STATIC_CAST(xed_uint_t,itext[i]));
printf("\n");
xed_error = xed_decode_with_features(&xedd,
bytes,
&chip_features);
if (xed_error != XED_ERROR_NONE) {
xed_decode_error(0, 0, itext, xed_error, dec_length);
if (verbose) {
print_enc_bits(&xedd, xed_error);
}
exit(1);
}
printf("iclass %s\t",
printf("category %s\t" ,
printf("ISA-extension %s\t",
printf("ISA-set %s\n" ,
printf("instruction-length %u\n",
printf("operand-width %u\n",
printf("effective-operand-width %u\n",
printf("effective-address-width %u\n",
printf("stack-address-width %u\n",
printf("iform-enum-name %s\n",
printf("iform-enum-name-dispatch (zero based) %u\n",
printf("iclass-max-iform-dispatch %u\n",
printf("Nominal opcode position %u\n",
printf("Nominal opcode 0x%02x\n",
// operands
print_operands(&xedd);
// memops
print_memops(&xedd);
// flags
print_flags(&xedd);
print_reads_zf_flag(&xedd);
// attributes
print_attributes(&xedd);
// misc
print_misc(&xedd);
print_branch_hints(&xedd);
if (verbose) {
// encoding
print_enc_bits(&xedd, xed_error);
}
return 0;
}
XED_DLL_EXPORT xed_cpuid_group_enum_t xed_get_cpuid_group_enum_for_isa_set(xed_isa_set_enum_t isaset, xed_uint_t i)
Returns the name of the i'th cpuid group associated with the given isa-set.
XED_DLL_EXPORT xed_cpuid_rec_enum_t xed_get_cpuid_rec_enum_for_group(xed_cpuid_group_enum_t group, xed_uint_t i)
Returns the name of the i'th cpuid record associated with the given cpuid group.
XED_DLL_EXPORT xed_bool_t xed_get_cpuid_rec(xed_cpuid_rec_enum_t cpuid_bit, xed_cpuid_rec_t *p)
provides the details of the CPUID specification, if the enumeration value is not sufficient.
XED_DLL_EXPORT const xed_simple_flag_t * xed_decoded_inst_get_rflags_info(const xed_decoded_inst_t *p)
See the comment on xed_decoded_inst_uses_rflags().
static XED_INLINE xed_isa_set_enum_t xed_decoded_inst_get_isa_set(xed_decoded_inst_t const *const p)
Return the instruction xed_isa_set_enum_t enumeration.
Definition xed-decoded-inst-api.h:69
static XED_INLINE xed_operand_width_enum_t xed_operand_width(const xed_operand_t *p)
Definition xed-inst.h:111
static XED_INLINE const xed_inst_t * xed_decoded_inst_inst(const xed_decoded_inst_t *p)
Return the xed_inst_t structure for this instruction.
Definition xed-decoded-inst-api.h:47
XED_DLL_EXPORT xed_reg_enum_t xed_decoded_inst_get_seg_reg(const xed_decoded_inst_t *p, unsigned int mem_idx)
XED_DLL_EXPORT xed_bool_t xed_classify_avx512_maskop(const xed_decoded_inst_t *d)
True for AVX512 (VEX-encoded) K-mask operations.
XED_DLL_EXPORT unsigned int xed_decoded_inst_operand_element_size_bits(const xed_decoded_inst_t *p, unsigned int operand_index)
Return the size of an element in bits (for SSE and AVX operands)
XED_DLL_EXPORT xed_reg_enum_t xed_decoded_inst_get_reg(const xed_decoded_inst_t *p, xed_operand_enum_t reg_operand)
Return the specified register operand.
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_nprefixes(const xed_decoded_inst_t *p)
Returns the number of legacy prefixes.
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_mem_read(const xed_decoded_inst_t *p, unsigned int mem_idx)
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_memory_displacement_width(const xed_decoded_inst_t *p, unsigned int mem_idx)
Result in BYTES.
static XED_INLINE xed_extension_enum_t xed_decoded_inst_get_extension(const xed_decoded_inst_t *p)
Return the instruction xed_extension_enum_t enumeration.
Definition xed-decoded-inst-api.h:62
static XED_INLINE xed_iclass_enum_t xed_decoded_inst_get_iclass(const xed_decoded_inst_t *p)
Return the instruction xed_iclass_enum_t enumeration.
Definition xed-decoded-inst-api.h:76
static XED_INLINE xed_operand_visibility_enum_t xed_operand_operand_visibility(const xed_operand_t *p)
Definition xed-inst.h:87
XED_DLL_EXPORT unsigned int xed_decoded_inst_get_memop_address_width(const xed_decoded_inst_t *p, xed_uint_t memop_idx)
Returns the addressing width in bits (16,32,64) for MEM0 (memop_idx==0) or MEM1 (memop_idx==1).
XED_DLL_EXPORT xed_int64_t xed_decoded_inst_get_branch_displacement(const xed_decoded_inst_t *p)
XED_DLL_EXPORT xed_attribute_enum_t xed_attribute(unsigned int i)
Return the i'th global attribute in a linear sequence, independent of any instruction.
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_is_apx_zu(const xed_decoded_inst_t *p)
Return non-zero value for APX-Promtoed zero-upper instructions (ZU).
XED_DLL_EXPORT xed_operand_action_enum_t xed_decoded_inst_operand_action(const xed_decoded_inst_t *p, unsigned int operand_index)
Interpret the operand action in light of AVX512 masking and zeroing/merging.
static XED_INLINE xed_operand_enum_t xed_operand_name(const xed_operand_t *p)
Definition xed-inst.h:80
static XED_INLINE unsigned int xed_inst_noperands(const xed_inst_t *p)
Number of instruction operands.
Definition xed-inst.h:313
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_masked_vector_operation(xed_decoded_inst_t *p)
Returns 1 iff the instruction uses destination-masking.
static XED_INLINE const xed_operand_values_t * xed_decoded_inst_operands_const(const xed_decoded_inst_t *p)
Obtain a constant pointer to the operands.
Definition xed-decoded-inst-api.h:148
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_avx512_dest_elements(const xed_decoded_inst_t *p)
Returns the maximum number elements processed for an AVX512 vector instruction.
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_uses_rflags(const xed_decoded_inst_t *p)
This returns 1 if the flags are read or written.
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_branch_displacement_width_bits(const xed_decoded_inst_t *p)
Result in BITS.
XED_DLL_EXPORT unsigned int xed_attribute_max(void)
Return the maximum number of defined attributes, independent of any instruction.
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_branch_displacement_width(const xed_decoded_inst_t *p)
Result in BYTES.
XED_DLL_EXPORT xed_bool_t xed_classify_avx512(const xed_decoded_inst_t *d)
True for AVX512 (EVEX-encoded) SIMD and (VEX encoded) K-mask instructions.
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_has_default_flags_values(const xed_decoded_inst_t *xedd)
Returns a non-zero value if the instruction supports "Default Flags Values" (DFV).
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_scale(const xed_decoded_inst_t *p, unsigned int mem_idx)
XED_DLL_EXPORT xed_uint64_t xed_decoded_inst_get_unsigned_immediate(const xed_decoded_inst_t *p)
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_immediate_is_signed(const xed_decoded_inst_t *p)
Return true if the first immediate (IMM0) is signed.
struct xed_inst_s xed_inst_t
constant information about a decoded instruction form, including the pointer to the constant operand ...
static XED_INLINE xed_uint_t xed_decoded_inst_get_machine_mode_bits(const xed_decoded_inst_t *p)
Returns 16/32/64 indicating the machine mode with in bits.
Definition xed-decoded-inst-api.h:315
XED_DLL_EXPORT const xed_operand_t * xed_inst_operand(const xed_inst_t *p, unsigned int i)
Obtain a pointer to an individual operand.
XED_DLL_EXPORT xed_uint32_t xed_inst_get_attribute(const xed_inst_t *p, xed_attribute_enum_t attr)
Scan for the attribute attr and return 1 if it is found, 0 otherwise.
XED_DLL_EXPORT unsigned int xed_decoded_inst_operand_length_bits(const xed_decoded_inst_t *p, unsigned int operand_index)
Return the length in bits of the operand_index'th operand.
static XED_INLINE unsigned int xed_decoded_inst_get_iform_enum_dispatch(const xed_decoded_inst_t *p)
Return the instruction zero-based iform number based on masking the corresponding xed_iform_enum_t.
Definition xed-decoded-inst-api.h:393
XED_DLL_EXPORT xed_bool_t xed_classify_sse(const xed_decoded_inst_t *d)
True for SSE/SSE2/etc.
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_get_default_flags_values(const xed_decoded_inst_t *xedd, xed_flag_dfv_t *p)
Extracts the default flags values into the provided xed_flag_dfv_t struct.
XED_DLL_EXPORT xed_int64_t xed_decoded_inst_get_memory_displacement(const xed_decoded_inst_t *p, unsigned int mem_idx)
XED_DLL_EXPORT unsigned int xed_decoded_inst_operand_elements(const xed_decoded_inst_t *p, unsigned int operand_index)
Return the number of element in the operand (for SSE and AVX operands)
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_is_broadcast(const xed_decoded_inst_t *p)
Return 1 for broadcast instructions or AVX512 load-op instructions using the broadcast feature 0 othe...
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_vector_length_bits(xed_decoded_inst_t const *const p)
Returns 128, 256 or 512 for operations in the VEX, EVEX (or XOP) encoding space and returns 0 for (mo...
XED_DLL_EXPORT xed_int32_t xed_decoded_inst_get_signed_immediate(const xed_decoded_inst_t *p)
static XED_INLINE xed_exception_enum_t xed_inst_exception(const xed_inst_t *p)
Return xed_exception_enum_t if present for the specified instruction.
Definition xed-inst.h:359
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_number_of_memory_operands(const xed_decoded_inst_t *p)
static XED_INLINE void xed_decoded_inst_set_input_chip(xed_decoded_inst_t *p, xed_chip_enum_t chip)
Set a user-specified xed_chip_enum_t chip name for restricting decode.
Definition xed-decoded-inst-api.h:354
XED_DLL_EXPORT xed_uint32_t xed_decoded_inst_get_attribute(const xed_decoded_inst_t *p, xed_attribute_enum_t attr)
Returns 1 if the attribute is defined for this instruction.
XED_DLL_EXPORT xed_bool_t xed_classify_apx(const xed_decoded_inst_t *d)
True for APX instructions.
XED_DLL_EXPORT xed_error_enum_t xed_decode_with_features(xed_decoded_inst_t *xedd, const xed_uint8_t *itext, const unsigned int bytes, xed_chip_features_t *features)
See xed_decode().
static XED_INLINE xed_uint_t xed_decoded_inst_get_length(const xed_decoded_inst_t *p)
Return the length of the decoded instruction in bytes.
Definition xed-decoded-inst-api.h:288
static XED_INLINE xed_uint8_t xed_decoded_inst_get_second_immediate(const xed_decoded_inst_t *p)
Return the second immediate.
Definition xed-decoded-inst-api.h:526
XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_immediate_width_bits(const xed_decoded_inst_t *p)
Return the immediate width in BITS.
XED_DLL_EXPORT xed_reg_enum_t xed_decoded_inst_get_index_reg(const xed_decoded_inst_t *p, unsigned int mem_idx)
XED_DLL_EXPORT xed_uint32_t xed_decoded_inst_get_operand_width(const xed_decoded_inst_t *p)
Returns the operand width in bits: 8/16/32/64.
XED_DLL_EXPORT xed_bool_t xed_classify_amx(const xed_decoded_inst_t *d)
True for AMX instructions.
XED_DLL_EXPORT xed_iclass_enum_t xed_rep_remove(xed_iclass_enum_t x)
// return the corresponding xed_iclass_enum_t without that prefix.
static XED_INLINE xed_category_enum_t xed_decoded_inst_get_category(const xed_decoded_inst_t *p)
Return the instruction xed_category_enum_t enumeration.
Definition xed-decoded-inst-api.h:55
XED_DLL_EXPORT void xed_decoded_inst_zero_set_mode(xed_decoded_inst_t *p, const xed_state_t *dstate)
Zero the decode structure, but set the machine state/mode information.
XED_DLL_EXPORT unsigned int xed_decoded_inst_get_memory_operand_length(const xed_decoded_inst_t *p, unsigned int memop_idx)
returns bytes
XED_DLL_EXPORT xed_bool_t xed_decoded_inst_mem_written(const xed_decoded_inst_t *p, unsigned int mem_idx)
XED_DLL_EXPORT xed_reg_enum_t xed_decoded_inst_get_base_reg(const xed_decoded_inst_t *p, unsigned int mem_idx)
static XED_INLINE xed_iform_enum_t xed_decoded_inst_get_iform_enum(const xed_decoded_inst_t *p)
Return the instruction iform enum of type xed_iform_enum_t .
Definition xed-decoded-inst-api.h:382
struct xed_operand_s xed_operand_t
Constant information about an individual generic operand, like an operand template,...
XED_DLL_EXPORT xed_operand_element_type_enum_t xed_decoded_inst_operand_element_type(const xed_decoded_inst_t *p, unsigned int operand_index)
Return the type of an element of type xed_operand_element_type_enum_t (for SSE and AVX operands)
XED_DLL_EXPORT xed_bool_t xed_classify_avx(const xed_decoded_inst_t *d)
True for AVX/AVX2 SIMD VEX-encoded operations.
XED_DLL_EXPORT xed_chip_enum_t str2xed_chip_enum_t(const char *s)
This converts strings to xed_chip_enum_t types.
XED_DLL_EXPORT const char * xed_operand_width_enum_t2str(const xed_operand_width_enum_t p)
This converts strings to xed_operand_width_enum_t types.
XED_DLL_EXPORT const char * xed_extension_enum_t2str(const xed_extension_enum_t p)
This converts strings to xed_extension_enum_t types.
XED_DLL_EXPORT const char * xed_chip_enum_t2str(const xed_chip_enum_t p)
This converts strings to xed_chip_enum_t types.
XED_DLL_EXPORT const char * xed_operand_enum_t2str(const xed_operand_enum_t p)
This converts strings to xed_operand_enum_t types.
XED_DLL_EXPORT xed_isa_set_enum_t str2xed_isa_set_enum_t(const char *s)
This converts strings to xed_isa_set_enum_t types.
XED_DLL_EXPORT xed_operand_enum_t str2xed_operand_enum_t(const char *s)
This converts strings to xed_operand_enum_t types.
XED_DLL_EXPORT const char * xed_reg_enum_t2str(const xed_reg_enum_t p)
This converts strings to xed_reg_enum_t types.
XED_DLL_EXPORT const char * xed_reg_class_enum_t2str(const xed_reg_class_enum_t p)
This converts strings to xed_reg_class_enum_t types.
XED_DLL_EXPORT const char * xed_isa_set_enum_t2str(const xed_isa_set_enum_t p)
This converts strings to xed_isa_set_enum_t types.
XED_DLL_EXPORT const char * xed_cpuid_group_enum_t2str(const xed_cpuid_group_enum_t p)
This converts strings to xed_cpuid_group_enum_t types.
XED_DLL_EXPORT const char * xed_category_enum_t2str(const xed_category_enum_t p)
This converts strings to xed_category_enum_t types.
XED_DLL_EXPORT const char * xed_operand_element_type_enum_t2str(const xed_operand_element_type_enum_t p)
This converts strings to xed_operand_element_type_enum_t types.
XED_DLL_EXPORT const char * xed_operand_visibility_enum_t2str(const xed_operand_visibility_enum_t p)
This converts strings to xed_operand_visibility_enum_t types.
XED_DLL_EXPORT const char * xed_attribute_enum_t2str(const xed_attribute_enum_t p)
This converts strings to xed_attribute_enum_t types.
XED_DLL_EXPORT const char * xed_operand_action_enum_t2str(const xed_operand_action_enum_t p)
This converts strings to xed_operand_action_enum_t types.
XED_DLL_EXPORT const char * xed_exception_enum_t2str(const xed_exception_enum_t p)
This converts strings to xed_exception_enum_t types.
XED_DLL_EXPORT const char * xed_iform_enum_t2str(const xed_iform_enum_t p)
This converts strings to xed_iform_enum_t types.
XED_DLL_EXPORT const char * xed_iclass_enum_t2str(const xed_iclass_enum_t p)
This converts strings to xed_iclass_enum_t types.
XED_DLL_EXPORT const char * xed_cpuid_rec_enum_t2str(const xed_cpuid_rec_enum_t p)
This converts strings to xed_cpuid_rec_enum_t types.
XED_DLL_EXPORT const xed_flag_set_t * xed_simple_flag_get_read_flag_set(const xed_simple_flag_t *p)
return union of bits for read flags
XED_DLL_EXPORT const xed_flag_set_t * xed_simple_flag_get_written_flag_set(const xed_simple_flag_t *p)
return union of bits for written flags
struct xed_flag_enum_s xed_flag_action_t
Associated with each flag field there can be one action.
struct xed_simple_flag_s xed_simple_flag_t
A collection of xed_flag_action_t's and unions of read and written flags.
static XED_INLINE unsigned int xed_flag_set_mask(const xed_flag_set_t *p)
Return the flags as a mask
Definition xed-flags.h:236
XED_DLL_EXPORT xed_bool_t xed_simple_flag_writes_flags(const xed_simple_flag_t *p)
boolean test to see if flags are written, scans the flags
XED_DLL_EXPORT unsigned int xed_simple_flag_get_nflags(const xed_simple_flag_t *p)
returns the number of flag-actions
XED_DLL_EXPORT xed_bool_t xed_simple_flag_get_may_write(const xed_simple_flag_t *p)
Indicates the flags are only conditionally written.
XED_DLL_EXPORT int xed_flag_set_print(const xed_flag_set_t *p, char *buf, int buflen)
print the flag set in the supplied buffer
XED_DLL_EXPORT xed_bool_t xed_simple_flag_reads_flags(const xed_simple_flag_t *p)
boolean test to see if flags are read, scans the flags
XED_DLL_EXPORT int xed_flag_action_print(const xed_flag_action_t *p, char *buf, int buflen)
print the flag & actions
XED_DLL_EXPORT const xed_flag_action_t * xed_simple_flag_get_flag_action(const xed_simple_flag_t *p, unsigned int i)
return the specific flag-action.
union xed_flag_dfv_s xed_flag_dfv_t
a struct representing an instruction's default flags values
XED_DLL_EXPORT xed_bool_t xed_simple_flag_get_must_write(const xed_simple_flag_t *p)
the flags always written
XED_DLL_EXPORT const xed_flag_set_t * xed_simple_flag_get_undefined_flag_set(const xed_simple_flag_t *p)
return union of bits for undefined flags
struct xed_iform_info_s xed_iform_info_t
Statically available information about iforms.
XED_DLL_EXPORT xed_uint32_t xed_iform_max_per_iclass(xed_iclass_enum_t iclass)
Return the maximum number of iforms for a particular iclass.
struct xed_state_s xed_state_t
Encapsulates machine modes for decoder/encoder requests.
static XED_INLINE void xed_state_zero(xed_state_t *p)
clear the xed_state_t
Definition xed-state.h:88
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_repne_prefix(const xed_operand_values_t *p)
True if the instruction as a F2 REP prefix (used for opcode refining, for rep for string operations,...
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_real_rep(const xed_operand_values_t *p)
True if the instruction has a real REP prefix.
XED_DLL_EXPORT xed_uint32_t xed_operand_values_get_effective_address_width(const xed_operand_values_t *p)
Returns The effective address width in bits: 16/32/64.
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_rep_prefix(const xed_operand_values_t *p)
True if the instruction as a F3 REP prefix (used for opcode refining, for rep for string operations,...
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_operand_size_prefix(const xed_operand_values_t *p)
This does not include the cases when the 66 prefix is used an opcode-refining prefix for multibyte op...
XED_DLL_EXPORT xed_bool_t xed_operand_values_mandatory_66_prefix(const xed_operand_values_t *p)
This is exclusive to cases whereby the 66 prefix is mandatory.
XED_DLL_EXPORT xed_uint32_t xed_operand_values_get_stack_address_width(const xed_operand_values_t *p)
Returns The stack address width in bits: 16/32/64.
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_66_prefix(const xed_operand_values_t *p)
This includes any 66 prefix that shows up even if it is ignored.
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_memory_displacement(const xed_operand_values_t *p)
True if there is a memory displacement
XED_DLL_EXPORT xed_bool_t xed_operand_values_cet_no_track(const xed_operand_values_t *p)
Returns true for indirect call/jmp with 0x3E prefix (if the legacy prefix rules are obeyed)
XED_DLL_EXPORT xed_bool_t xed_operand_values_branch_taken_hint(const xed_operand_values_t *p)
Returns true if 0x3E prefix on Jcc.
XED_DLL_EXPORT xed_uint32_t xed_operand_values_get_effective_operand_width(const xed_operand_values_t *p)
Returns The effective operand width in bits: 16/32/64.
XED_DLL_EXPORT xed_bool_t xed_operand_values_branch_not_taken_hint(const xed_operand_values_t *p)
Returns true if 0x2E prefix on Jcc.
XED_DLL_EXPORT xed_bool_t xed_operand_values_has_address_size_prefix(const xed_operand_values_t *p)
This indicates the presence of a 67 prefix.
XED_DLL_EXPORT xed_bits_t xed_operand_values_get_pp_vex_prefix(const xed_operand_values_t *p)
Return the [VEX,EVEX].PP encoding value (2 bits)
XED_DLL_EXPORT xed_reg_class_enum_t xed_reg_class(xed_reg_enum_t r)
Returns the register class of the given input register.
Definition xed-chip-features.h:32
a data structure representing a CPUID record
Definition xed-cpuid-rec.h:32
xed_uint32_t value
the required feature value
Definition xed-cpuid-rec.h:38
xed_uint8_t bit_start
the bit start index for the feature
Definition xed-cpuid-rec.h:36
xed_uint32_t leaf
cpuid leaf
Definition xed-cpuid-rec.h:33
xed_uint32_t subleaf
cpuid subleaf
Definition xed-cpuid-rec.h:34
xed_uint8_t bit_end
the bit end index for the feature
Definition xed-cpuid-rec.h:37
xed_reg_enum_t reg
the register containing the bits (EAX,EBX,ECX,EDX)
Definition xed-cpuid-rec.h:35
xed_address_width_enum_t stack_addr_width
for 16b/32b modes
Definition xed-state.h:43
xed_machine_mode_enum_t mmode
real architected machine modes
Definition xed-state.h:41
xed_uint32_t cf
Definition xed-flags.h:41
xed_uint32_t of
Definition xed-flags.h:38
xed_uint32_t zf
Definition xed-flags.h:40
struct xed_flag_dfv_s::@333004213020376376023362311343071057326146327227 s
xed_uint32_t sf
Definition xed-flags.h:39
struct xed_flag_set_s::@375376022251055054054036045263171256041310075213 s
xed_uint32_t zf
Definition xed-flags.h:58
@ XED_ADDRESS_WIDTH_16b
16b addressing
Definition xed-address-width-enum.h:33
xed_attribute_enum_t
Definition xed-attribute-enum.h:133
@ XED_ATTRIBUTE_SIMD_SCALAR
Definition xed-attribute-enum.h:221
@ XED_ATTRIBUTE_APX_NF
Definition xed-attribute-enum.h:137
@ XED_ATTRIBUTE_APX_NDD
Definition xed-attribute-enum.h:136
@ XED_ATTRIBUTE_RING0
Definition xed-attribute-enum.h:218
xed_chip_enum_t
Definition xed-chip-enum.h:101
@ XED_CHIP_ALL
Definition xed-chip-enum.h:175
@ XED_CHIP_INVALID
Definition xed-chip-enum.h:102
XED_DLL_EXPORT void xed_modify_chip_features(xed_chip_features_t *p, xed_isa_set_enum_t isa_set, xed_bool_t present)
present = 1 to turn the feature on. present=0 to remove the feature.
XED_DLL_EXPORT void xed_get_chip_features(xed_chip_features_t *p, xed_chip_enum_t chip)
fill in the contents of p with the vector of chip features.
#define XED_MAX_INSTRUCTION_BYTES
Definition xed-common-defs.h:32
xed_cpuid_group_enum_t
Definition xed-cpuid-group-enum.h:352
@ XED_CPUID_GROUP_INVALID
Definition xed-cpuid-group-enum.h:353
xed_cpuid_rec_enum_t
Definition xed-cpuid-rec-enum.h:169
@ XED_CPUID_REC_INVALID
Definition xed-cpuid-rec-enum.h:170
#define XED_MAX_CPUID_RECS_PER_GROUP
Definition xed-cpuid-rec.h:42
#define XED_MAX_CPUID_GROUPS_PER_ISA_SET
Definition xed-cpuid-rec.h:41
xed_decoded_inst_t xed_operand_values_t
Definition xed-decoded-inst.h:95
@ XED_ERROR_NONE
There was no error.
Definition xed-error-enum.h:48
xed_exception_enum_t
Definition xed-exception-enum.h:116
@ XED_EXCEPTION_INVALID
Definition xed-exception-enum.h:117
union xed_flag_set_s xed_flag_set_t
Definition xed-flags.h:92
xed_iclass_enum_t
Definition xed-iclass-enum.h:2002
xed_isa_set_enum_t
Definition xed-isa-set-enum.h:310
@ XED_ISA_SET_INVALID
Definition xed-isa-set-enum.h:311
@ XED_ISA_SET_CET
Definition xed-isa-set-enum.h:474
@ XED_ISA_SET_MPX
Definition xed-isa-set-enum.h:518
@ XED_MACHINE_MODE_LEGACY_16
16b protected mode
Definition xed-machine-mode-enum.h:41
static XED_INLINE xed_bits_t xed3_operand_get_vexdest4(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1659
static XED_INLINE xed_bits_t xed3_operand_get_map(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1307
static XED_INLINE xed_bits_t xed3_operand_get_bcrc(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1651
static XED_INLINE xed_bits_t xed3_operand_get_roundc(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1675
static XED_INLINE xed_bits_t xed3_operand_get_rexw(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:715
static XED_INLINE xed_bits_t xed3_operand_get_sae(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1683
static XED_INLINE xed_bits_t xed3_operand_get_rex2(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:747
static XED_INLINE xed_bits_t xed3_operand_get_vexdest210(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1587
static XED_INLINE xed_bits_t xed3_operand_get_rexr(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:723
XED_DLL_EXPORT void xed3_set_generic_operand(xed_decoded_inst_t *d, xed_operand_enum_t operand, xed_uint32_t val)
static XED_INLINE xed_bits_t xed3_operand_get_pos_nominal_opcode(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1403
static XED_INLINE xed_bits_t xed3_operand_get_has_egpr(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:779
static XED_INLINE xed_bits_t xed3_operand_get_nf(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1723
static XED_INLINE xed_bits_t xed3_operand_get_evvspace(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1707
static XED_INLINE xed_bits_t xed3_operand_get_rexb(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:739
static XED_INLINE xed_bits_t xed3_operand_get_nd(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1715
static XED_INLINE xed_bits_t xed3_operand_get_reg(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:851
static XED_INLINE xed_bits_t xed3_operand_get_rm(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:867
static XED_INLINE xed_bits_t xed3_operand_get_vexvalid(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1491
static XED_INLINE xed_bits_t xed3_operand_get_zeroing(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1635
static XED_INLINE xed_bits_t xed3_operand_get_llrc(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1643
static XED_INLINE xed_bits_t xed3_operand_get_has_modrm(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1411
static XED_INLINE xed_bits_t xed3_operand_get_mod(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:843
static XED_INLINE xed_bits_t xed3_operand_get_ubit(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1699
static XED_INLINE xed_bits_t xed3_operand_get_rexx(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:731
static XED_INLINE xed_bits_t xed3_operand_get_rexr4(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:771
static XED_INLINE xed_bits_t xed3_operand_get_no_apx(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1523
static XED_INLINE xed_bits_t xed3_operand_get_scc(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1731
static XED_INLINE xed_bits_t xed3_operand_get_mask(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1667
static XED_INLINE xed_bits_t xed3_operand_get_nominal_opcode(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1395
static XED_INLINE xed_bits_t xed3_operand_get_rexx4(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:763
static XED_INLINE xed_bits_t xed3_operand_get_rexb4(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:755
static XED_INLINE xed_bits_t xed3_operand_get_vexdest3(const xed_decoded_inst_t *d)
Definition xed-operand-accessors.h:1579
xed_operand_action_enum_t
Definition xed-operand-action-enum.h:35
xed_operand_enum_t
Definition xed-operand-enum.h:171
@ XED_OPERAND_MEM0
Definition xed-operand-enum.h:223
@ XED_OPERAND_BASE0
Definition xed-operand-enum.h:177
@ XED_OPERAND_AGEN
Definition xed-operand-enum.h:174
@ XED_OPERAND_REG4
Definition xed-operand-enum.h:269
@ XED_OPERAND_REG0
Definition xed-operand-enum.h:265
@ XED_OPERAND_RELBR
Definition xed-operand-enum.h:275
@ XED_OPERAND_IMM0
Definition xed-operand-enum.h:210
@ XED_OPERAND_REG5
Definition xed-operand-enum.h:270
@ XED_OPERAND_ABSBR
Definition xed-operand-enum.h:173
@ XED_OPERAND_REG6
Definition xed-operand-enum.h:271
@ XED_OPERAND_REG2
Definition xed-operand-enum.h:267
@ XED_OPERAND_MEM1
Definition xed-operand-enum.h:224
@ XED_OPERAND_REG7
Definition xed-operand-enum.h:272
@ XED_OPERAND_REG8
Definition xed-operand-enum.h:273
@ XED_OPERAND_REG9
Definition xed-operand-enum.h:274
@ XED_OPERAND_REG3
Definition xed-operand-enum.h:268
@ XED_OPERAND_INVALID
Definition xed-operand-enum.h:172
@ XED_OPERAND_IMM1
Definition xed-operand-enum.h:212
@ XED_OPERAND_BASE1
Definition xed-operand-enum.h:178
@ XED_OPERAND_REG1
Definition xed-operand-enum.h:266
@ XED_OPERAND_PTR
Definition xed-operand-enum.h:262
#define XED_REINTERPRET_CAST(x, y)
Definition xed-portability.h:28
XED_DLL_EXPORT void xed_strcpy(char *dst, const char *src)
#define XED_FMT_LX16
Definition xed-portability.h:137
#define XED_FMT_LD
Definition xed-portability.h:136
xed_reg_enum_t
Definition xed-reg-enum.h:448
@ XED_REG_INVALID
Definition xed-reg-enum.h:449
unsigned int xed_uint_t
Definition xed-types.h:39
int32_t xed_int32_t
Definition xed-types.h:36
uint32_t xed_uint32_t
Definition xed-types.h:32
uint64_t xed_uint64_t
Definition xed-types.h:33
unsigned int xed_bits_t
Definition xed-types.h:41
int64_t xed_int64_t
Definition xed-types.h:37
XED_DLL_EXPORT int xed_itoa_bin(char *buf, xed_uint64_t f, xed_uint_t bits_to_print, xed_uint_t buflen)
Convert the input value f into its binary representation as a string and store it in buf.
XED_DLL_EXPORT int xed_itoa_hex_ul(char *buf, xed_uint64_t f, xed_uint_t bits_to_print, xed_bool_t leading_zeros, int buflen, xed_bool_t lowercase)
XED_DLL_EXPORT xed_int64_t xed_sign_extend_arbitrary_to_64(xed_uint64_t x, unsigned int bits)
arbitrary sign extension from a qty of "bits" length to 64b

Here are a few examples of running the program:

% ./xed-dec 01 c0
iclass ADD category BINARY ISA-extension BASE ISA-set I86
instruction-length 2
operand-width 32
effective-operand-width 32
effective-address-width 32
stack-address-width 32
iform-enum-name ADD_GPRv_GPRv_01
iform-enum-name-dispatch (zero based) 14
iclass-max-iform-dispatch 42
Nominal opcode position 0
Nominal opcode 0x01
Operands
# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS
# ==== ======= === == === ==== ===== ===== ====== ======== ========
0 REG0 REG0=EAX EXPLICIT RW V 32 4 1 32 INT GPR
1 REG1 REG1=EAX EXPLICIT R V 32 4 1 32 INT GPR
2 REG2 REG2=EFLAGS SUPPRESSED W Y 32 4 1 32 INT FLAGS
Memory Operands
MemopBytes = 0
FLAGS:
must-write-rflags of-mod sf-mod zf-mod af-mod pf-mod cf-mod
read: mask=0x0
written: of sf zf af pf cf mask=0x8d5
undefined: mask=0x0
ATTRIBUTES: SCALABLE
ISA SET: [I86]
===============================================================================
% ./xed-dec f2 0f 58 9c 24 e0 00 00 00
iclass ADDSD category SSE ISA-extension SSE2 ISA-set SSE2
instruction-length 9
operand-width 32
effective-operand-width 32
effective-address-width 32
stack-address-width 32
iform-enum-name ADDSD_XMMsd_MEMsd
iform-enum-name-dispatch (zero based) 0
iclass-max-iform-dispatch 2
Nominal opcode position 2
Nominal opcode 0x58
Operands
# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS
# ==== ======= === == === ==== ===== ===== ====== ======== ========
0 REG0 REG0=XMM3 EXPLICIT RW SD 64 8 1 64 DOUBLE XMM
1 MEM0 (see below) EXPLICIT R SD 64 8 1 64 DOUBLE INVALID
Memory Operands
0 read SEG= SS BASE= ESP/GPR DISPLACEMENT_BYTES= 4 0x00000000000000e0 base10=224 ASZ0=32
MemopBytes = 8
ATTRIBUTES: MXCSR SIMD_SCALAR
F2 PREFIX
EXCEPTION TYPE: SSE_TYPE_3
SSE
SCALAR
Number of legacy prefixes: 1
ISA SET: [SSE2]
0 CPUID GROUP NAME: [SSE2]
0 CPUID RECORD NAME: [SSE2]
{Leaf 0x00000001, subleaf 0x00000000, EDX[26:26]} = 1
===============================================================================
./xed-dec f3 90
iclass PAUSE category MISC ISA-extension PAUSE ISA-set PAUSE
instruction-length 2
operand-width 32
effective-operand-width 32
effective-address-width 32
stack-address-width 32
iform-enum-name PAUSE
iform-enum-name-dispatch (zero based) 0
iclass-max-iform-dispatch 1
Nominal opcode position 1
Nominal opcode 0x90
Operands
# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS
# ==== ======= === == === ==== ===== ===== ====== ======== ========
Memory Operands
MemopBytes = 0
ATTRIBUTES: NOTSX
F3 PREFIX
Number of legacy prefixes: 1
ISA SET: [PAUSE]
===============================================================================